Content Curator | Updated on - Mar 27, 2026

IIT Jammu M.Tech in VLSI Design is a 2-year full-time postgraduate programme offered under the Department of Electrical Engineering at the Indian Institute of Technology Jammu, located at the Jagti campus in Jammu, J&K. The programme provides advanced training in VLSI circuit design, digital and analog IC design, FPGA-based design, embedded systems, semiconductor device physics, and hardware description languages (VHDL/Verilog). The total tuition fee is Rs. 80,000 for the entire programme (Rs. 20,000 per semester for 4 semesters) for General/OBC candidates, while SC/ST candidates are exempt from tuition fees. Admission is based on a valid GATE score in Electronics and Communication Engineering (EC), followed by a written test and/or interview conducted by IIT Jammu. The programme is highly sought after by electronics and communication engineering graduates aiming for careers in semiconductor companies, chip design firms, and embedded systems organisations.

Admissions for the 2026-27 session are expected to open in March-April 2026, following the declaration of GATE 2026 results on March 19, 2026. Based on the 2025 admission cycle, the application window is expected to open around late March 2026 and close by mid-April 2026. Candidates must register on the COAP (Common Offer Acceptance Portal) before applying on the IIT Jammu portal. The batch is expected to commence in July/August 2026.

Key Points

The programme is offered under the Department of Electrical Engineering at IIT Jammu, an Institute of National Importance established in 2016.
Specialisation in VLSI Design covers digital IC design, analog IC design, FPGA design, VLSI testing, semiconductor devices, and hardware description languages (VHDL/Verilog).
Admission requires a valid GATE score in Electronics and Communication Engineering (EC) paper only.
General category candidates must have a minimum of 60% marks in B.E./B.Tech./M.Sc. in Electronics Engineering or related disciplines.
Teaching Assistantship (TA) stipend of Rs. 12,400 per month is available for GATE-qualified students offered TA positions.
The institute is ranked 56th in Engineering by NIRF 2025.
M.Tech VLSI Design graduates from IIT Jammu have recorded the highest average package among all M.Tech specialisations at the institute, with an average of Rs. 27.8 LPA in 2023-24.

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Scholarships
Placements
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FAQs

IIT Jammu Latest Updates and News

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30 Mar, 2026 GATE COAP 2026 Registration has begun @coap2026.iitr.ac.in. Round 1 will be conducted from May 11 to 13, 2026. Read more.

IITJ M.Tech VLSI Design Fees

The M.Tech (VLSI Design) programme at IIT Jammu is among the most affordable VLSI-focused postgraduate programmes in the country, given its IIT status. For General/OBC candidates, the tuition fee is Rs. 20,000 per semester, totalling Rs. 80,000 over 4 semesters. SC/ST candidates are fully exempt from tuition fees. In addition to tuition, students pay semester fees covering hostel and facilities charges, an annual fee, and a one-time security deposit at the time of admission.

Fee Structure

Fee Component	General / OBC (per semester)	SC / ST (per semester)
Tuition Fee	Rs. 20,000	Nil (Exempt)
Semester Fees (Hostel & Facilities)	Rs. 35,480	Rs. 35,480
Annual Fee (charged in odd semester only)	Rs. 3,280	Rs. 3,280
One-Time & Security Deposit (at admission)	Rs. 16,740	Rs. 16,740
Hostel Fees (Mess Advance - one time at admission)	Rs. 29,000	Rs. 29,000
Total Fees (Full Programme - 4 Semesters)	Rs. 2,37,980	Rs. 1,97,980

Mess charges are notified separately and are approximately Rs. 5,000-6,000 per month; these are not included in the above total.
Fee components other than tuition fee increase annually at the rate of 7% for the 2025 batch.
The one-time security deposit is refundable at the time of leaving the institute.
Hostel and mess facilities are provided subject to availability.
Application fee: Rs. 300 for General/EWS/OBC candidates and Rs. 200 for SC/ST/PWD candidates (non-refundable).
Fees are paid semester-wise; no EMI option is officially available.

Fees As Per Official Website-

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IITJ M.Tech VLSI Design Admission 2026

Admissions to the M.Tech (VLSI Design) programme at IIT Jammu are conducted annually for the July/August session. The process involves GATE score-based shortlisting followed by a written test and/or interview. Candidates must mandatorily register on the COAP portal before applying on the IIT Jammu application portal. Based on the 2025 cycle, the 2026 admission process is expected to follow a similar timeline.

Important Dates

Event	Date (Tentative for 2026)
GATE 2026 Result Declaration	March 19, 2026
COAP 2026 Registration Opens	Mid-March 2026
IIT Jammu Application Portal Opens	Late March 2026
Last Date to Submit Online Application	Mid-April 2026
Shortlisting / Written Test / Interview	April - May 2026
COAP Round 1 Offers	Mid-May 2026
COAP Round 2 Offers	Late May 2026
COAP Round 3 Offers	Early June 2026
COAP Round 4 Offers	Mid-June 2026
COAP Round 5 (Decisive Round)	Late June 2026
Reporting / Registration for Admitted Students	July 2026
Commencement of Classes	Late July / August 2026

GATE 2026 Exam Dates

Event	Date
GATE 2026 Registration Opens	August 28, 2025
GATE 2026 Registration Closes	October 13, 2025
GATE 2026 Admit Card Release	January 13, 2026
GATE 2026 Exam Dates	February 7, 8, 14, 15, 2026
GATE 2026 Answer Key Release	February 19, 2026
GATE 2026 Result Declaration	March 19, 2026

The dates mentioned above are tentative and subject to change.

Eligibility Criteria

Candidates must hold a B.E./B.Tech./M.Sc. degree in Electronics Engineering, Electronics and Communication Engineering, Electronics and Instrumentation Engineering, Electrical and Electronics Engineering, Electronics and Telecommunication, or Electrical Engineering with a minimum of 60% aggregate marks or equivalent CGPA (SC/ST/OBC-NCL/PWD/EWS candidates get a relaxation of 5%).
Candidates must have a minimum of 60% marks or equivalent CGPA in secondary (X) and senior secondary (XII) school examinations (relaxation of 5% in either X or XII is allowed).
Candidates must have a valid GATE scorecard with EC (Electronics and Communication Engineering) paper code and a minimum score of 300 (for SC/ST/PWD category the minimum score is 200).

Admission Process

Register on the COAP portal (gate.iisc.ac.in/coap2026) - registration is free.
Apply on the IIT Jammu PG application portal (saral.iitjammu.ac.in/pgapplication) and pay the application fee.
Shortlisting is done based on GATE score and qualifying degree marks.
Shortlisted candidates are called for a written test and/or interview conducted by the Department of Electrical Engineering.
Admission offers are communicated through the COAP portal.
Candidates must accept, retain, or reject offers within 48 hours of each COAP round.
Final admission is confirmed upon document verification and fee payment at the time of reporting.

IITJ M.Tech VLSI Design Scholarships 2026

Students admitted to the M.Tech (VLSI Design) programme at IIT Jammu can avail of financial support primarily through the Teaching Assistantship (TA) scheme funded by MHRD/Government of India. GATE-qualified students who are offered TA positions receive a monthly stipend that significantly offsets the cost of education. Given the high placement packages in VLSI, many students also receive pre-placement offers and internship stipends from semiconductor companies during the programme.

Scholarship Details

Scholarship / Assistantship	Eligibility	Amount
Teaching Assistantship (HTRA - GATE-based)	GATE-qualified M.Tech students offered TA position	Rs. 12,400 per month
Tuition Fee Waiver	SC/ST category students	Full tuition fee exemption
Tuition Fee Concession	General/OBC with family income between Rs. 1 lakh and Rs. 5 lakh (as per institute norms)	Partial waiver (as per institute norms)
PMRF (Prime Minister's Research Fellowship)	Exceptional M.Tech students transitioning to Ph.D.	Rs. 70,000-80,000 per month (for Ph.D. phase)

The TA stipend of Rs. 12,400/month is the standard MHRD-mandated amount; AICTE has proposed a hike to Rs. 18,600/month but it has not been officially implemented as of March 2026.
No scholarship will be disbursed until all required documents including the final qualifying degree certificate are submitted physically.
TA positions are subject to availability and are not guaranteed to all admitted students.
Students must fulfil their TA duties (assisting in labs/tutorials) to continue receiving the stipend.

IITJ M.Tech VLSI Design Placement 2026

IIT Jammu's M.Tech VLSI Design programme stands out as one of the highest-paying specialisations at the institute. According to the 2023-24 placement data, M.Tech VLSI Design graduates recorded an average package of Rs. 27.8 LPA, the highest among all M.Tech specialisations at IIT Jammu. The semiconductor and chip design industry has been actively recruiting from IIT Jammu, with companies like Nvidia, Intel, Qualcomm, Samsung Semiconductors, and Mediatek visiting the campus. The strong demand for VLSI engineers in India's growing semiconductor ecosystem makes this one of the most career-rewarding M.Tech specialisations.

Placement Statistics

Placement Metric	M.Tech VLSI Design (2023-24)
Average Package	Rs. 27.8 LPA
Overall M.Tech Highest Package	Rs. 43 LPA
Overall M.Tech Placement Percentage	~78.6%
Total Recruiters (Institute-wide)	129

Top Recruiters for VLSI/EE: Nvidia, Intel, Qualcomm, Samsung Semiconductors, Mediatek, Arista Networks, Silicon Labs, MathWorks.

IIT Jammu M.Tech Vlsi Design Ranking

Collegedunia Ranking

#48 out of 500 in India 2025

#1st in Jammu and Kashmir

NIRF Ranking

#56 out of 300 in India 2025

#1st in Jammu and Kashmir

IIRF Ranking

#48 out of 150 in India 2025

#1st in Jammu and Kashmir

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IITJ M.Tech VLSI Design FAQs

Ques. What GATE paper is required for M.Tech VLSI Design at IIT Jammu?

Ans. Only GATE Electronics and Communication Engineering (EC) paper is accepted for admission to M.Tech VLSI Design at IIT Jammu. Candidates must have a minimum GATE score of 300 in EC (minimum 200 for SC/ST/PWD category).

Ques. What is the minimum GATE score required for M.Tech VLSI Design at IIT Jammu?

Ans. The official minimum GATE score requirement is 300 for General/OBC candidates and 200 for SC/ST/PWD candidates. However, the actual competitive cut-off is significantly higher due to the popularity of VLSI Design. A GATE EC score of 600+ is generally considered competitive for this specialisation at IIT Jammu.

Ques. Why is M.Tech VLSI Design from IIT Jammu considered a good option?

Ans. M.Tech VLSI Design from IIT Jammu offers an excellent return on investment. The average placement package for VLSI graduates was Rs. 27.8 LPA in 2023-24, the highest among all M.Tech specialisations at the institute. The total programme cost is under Rs. 2.5 lakh, and with a TA stipend of Rs. 12,400/month, the effective cost is further reduced. Top semiconductor companies like Nvidia, Intel, Qualcomm, and Samsung actively recruit from IIT Jammu.

Ques. Does IIT Jammu have good lab facilities for VLSI Design?

Ans. Yes, IIT Jammu has modern infrastructure including the Saptarshi Central Instrumentation Facility and dedicated EDA (Electronic Design Automation) tools for VLSI design. The Department of Electrical Engineering is equipped with industry-standard simulation and design tools. The institute also has a High-Performance Computing facility (Agastya supercomputer) that supports research activities.

Ques. What are the career options after M.Tech VLSI Design from IIT Jammu?

Ans. Graduates can pursue careers as VLSI design engineers, verification engineers, physical design engineers, and embedded systems engineers at semiconductor companies (Nvidia, Intel, Qualcomm, Samsung, Mediatek, Texas Instruments), chip design startups, and defence/space organisations (DRDO, ISRO, CDAC). The average package in the VLSI industry ranges from Rs. 15-40 LPA depending on the company and role. Some graduates also pursue Ph.D. programmes at IITs/IISc or abroad.

Ques. Is there a written test for M.Tech VLSI Design admission at IIT Jammu?

Ans. Yes, after initial shortlisting based on GATE score and academic performance, shortlisted candidates are called for a written test and/or interview conducted by the Department of Electrical Engineering. The written test typically covers topics from the EC GATE syllabus including digital electronics, analog circuits, signals and systems, and semiconductor devices. A high GATE score alone does not guarantee admission.