D. Y. Patil College of Engineering Pune M.Tech Embedded System and VLSI Design: Fees 2025, Course Duration, Dates, Eligibility

Yamuna Nagar Wakad, PuneEstd 1984 SPPU, Pune NAAC Grade A 3.2
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Collegedunia Team

Content Curator | Updated on - Sep 12, 2025

M.Tech Embedded System and VLSI Design at D. Y. Patil College of Engineering Pune is a 2 Years Degree. The course is offered On Campus as a Full Time program. D. Y. Patil College of Engineering Pune M.Tech Embedded System and VLSI Design Total Fees is INR 1,94,014 for 2025.

D. Y. Patil College of Engineering Pune offers a total of 13 seats for M.Tech Embedded System and VLSI Design. Candidates must have at least Graduation with 50%+ GATE to be eligible for admissions. Check D. Y. Patil College of Engineering Pune Admission 2025

According to The Times Of India Rankings 2025 for Engineering, D. Y. Patil College of Engineering Pune ranks 114 out of 175 in India. In Pune, the institute is ranked 18th by The Times Of India. Earlier, the institute ranked 122 out of 125 institutes in India.

D. Y. Patil College of Engineering Pune M.Tech Embedded System and VLSI Design Fees 2025

Fees (2025 - 2026) Total Fees
Total Fees (2025 - 2026) 1.94 Lakhs

* Fees is refundable

D. Y. Patil College of Engineering Pune M.Tech Embedded System and VLSI Design Previous Fees

Fees Year 1 (in INR) Year 2 (in INR)
Tuition Fees 39383 39383
Yearly Fees 39383 39383

* Fees is refundable

D. Y. Patil College of Engineering Pune M.Tech Embedded System and VLSI Design Admission 2025

The minimum eligibility for admission to M.Tech Embedded System and VLSI Design at D. Y. Patil College of Engineering Pune is Graduation with 50%+ GATE.

D. Y. Patil College of Engineering Pune Ranking 2025

D. Y. Patil College of Engineering Pune ranking 2025 has been released. You can check the agency-wise engineering ranking for D. Y. Patil College of Engineering Pune in the table below.

Ranking Agency Latest Previous
Collegedunia.com
#114 out of 175 (2025)
#18th Pune
#35 Maharashtra
#122 out of 125 (2024)
#15th Pune
#31 Maharashtra
Collegedunia.com
#69 out of 284 (2024)
#8th Pune
#14 Maharashtra
#44 out of 246 (2023)
Collegedunia.com
#13 out of 160 (2024)
#13 out of 160 (2023)
Collegedunia.com
#63 out of 173 (2024)
#130 out of 166 (2023)
Collegedunia.com
#230 out of 394 (2023)
#12th Pune
#25 Maharashtra

Also Check:

Read More
Application Date:Jul 1, 2025 - Jul 16, 2025
Course HighlightsDetails
duration2 Years (Full Time)
mode of studyOn Campus
total fees₹ 1.94 Lakhs
eligibilityGraduation with 50%+ GATE

D. Y. Patil College of Engineering Pune Latest Updates and News

19 Nov, 2025 GATE 2026 is scheduled for Feb 7, 8, 14, and 15, 2026, for ME/ MTech/ PhD admissions. The exam will be held in two sessions; the first session will be conducted from 9:30 AM to 12:30 PM, followed by the second session from 2:30 PM to 5:30 PM. For latest updates, check here.

D. Y. Patil College of Engineering Pune M.Tech Embedded System and VLSI Design Fees

Quota:
Fee TypeTotal Amount (INR)
tuition fee₹1.69 Lakhs
total academic fee₹1.94 Lakhs
hostel fee₹1.1 Lakhs
total fee₹3.04 Lakhs
* Fees is refundable

Fee Structure (As per official website) – 

Important Dates for M.Tech Embedded System and VLSI Design at D. Y. Patil College of Engineering Pune

Important Events

EventsDates
GATE 2026 Admit Card Date
Jan 07, 2026
Tentative
GATE 2026 Exam Dates
Feb 07, 2026
GATE 2026 Exam Dates
Feb 08, 2026
GATE 2026 Exam Dates
Feb 14, 2026
GATE 2026 Exam Dates
Feb 15, 2026
GATE 2026 Result Date
Mar 19, 2026
Tentative

Expired Events

EventsDates
Date of GATE 2026 Application Rectification
Oct 28, 2025 - Nov 10, 2025
GATE 2026 Registration Date
Aug 28, 2025 - Oct 13, 2025
Vacant Seat Admissions for Institute Level MAHCET 2025 [M.Tech]
Sep 02, 2025 - Sep 10, 2025

Important Events

EventsDates
GATE 2026 Admit Card Date
Jan 07, 2026
Tentative
GATE 2026 Exam Dates
Feb 07, 2026
GATE 2026 Exam Dates
Feb 08, 2026
GATE 2026 Exam Dates
Feb 14, 2026
GATE 2026 Exam Dates
Feb 15, 2026
GATE 2026 Result Date
Mar 19, 2026
Tentative

Expired Events

EventsDates
GATE 2026 Registration Date
Aug 28, 2025 - Oct 13, 2025
GATE 2026 Notification
Aug 05, 2025
Check entrance exam dates for admission in M.Tech Embedded System and VLSI Design at D. Y. Patil College of Engineering Pune -

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D. Y. Patil College of Engineering Pune M.Tech Embedded System and VLSI Design Admission Process

Eligibility Criteria

D. Y. Patil College of Engineering Pune M.Tech Embedded System and VLSI Design Ranking

Collegedunia Ranking

#312 out of 500 in India 2025 
#14th in Pune
#30 in Maharashtra

Indiatoday Ranking

#63 out of 269 in India 2025 
#7th in Pune
#11 in Maharashtra

The Week Ranking

#117 out of 286 in India 2025 
#11th in Pune
#17 in Maharashtra

Outlook Ranking

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