The M.Tech VLSI Design programme at Bharati Vidyapeeth Deemed University, Pune is a two-year AICTE-approved postgraduate degree at the University College of Engineering, Dhankawadi. The curriculum covers digital VLSI design, analogue IC design, FPGA-based prototyping, physical design, and design verification using industry-standard EDA tools. As India’s semiconductor sector expands, the programme targets electronics engineers for chip design, RTL verification, and physical design roles at fabless semiconductor companies, EDA firms, and electronics product manufacturers.
📋 Admission Status: Applications for the 2026-27 batch are currently open at Bharati Vidyapeeth Deemed University, with the application deadline on August 7, 2026 and the BVP CET conducted from February 15 to August 10, 2026.
Key Points
- Duration: 2 years (4 semesters), full-time at BVDU Dhankawadi campus, Pune
- Total Course Fee: INR 3,34,000 (excluding hostel; annual tuition INR 1,60,000)
- Entrance: GATE (Electronics and Communication) or BVP CET-PG Engineering for 2026-27
- Approved by AICTE; BVDU College of Engineering is NAAC-accredited and NBA-accredited
- Core subjects: Digital VLSI Design, Analogue IC Design, FPGA Prototyping, Physical Design
- Placement sectors: semiconductor companies, EDA tool vendors, electronics product manufacturers
- PG merit scholarships and Maharashtra government freeships available for eligible candidates
BVDU Pune M.Tech VLSI Design Fees
| Component | Amount (INR) |
|---|
| Tuition Fee (2 years) | INR 3,20,000 |
| Admission and Registration Fee (one time) | INR 5,000 |
| Examination Fee (per semester) | INR 3,500 |
| Caution Deposit (refundable) | INR 2,000 |
| Hostel and Mess (per year, optional) | INR 1,20,000 to INR 1,50,000 |
| Total Fees (Hostel charges separate) | INR 3,34,000 |
- The annual tuition fee is INR 1,60,000, payable in two instalments of INR 80,000 each.
- A one time admission and registration fee of INR 5,000 is collected at the time of enrolment.
- Tuition fees may see a marginal revision in the second year as per BVDU policy.
- Hostel and mess charges are separate and depend on AC or non AC selection at the BVDU Dhankawadi campus.
BVDU Pune M.Tech VLSI Design Admission 2026
Important Dates
| Event | Date |
|---|
| Application Form Release | January 2026 |
| Application Last Date | August 7, 2026 |
| BVP CET Exam Window | February 15 to August 10, 2026 |
| Counselling and Document Verification | May to August 2026 |
| Final Merit List | August 2026 |
| Classes Commence | August 2026 |
Entrance Exam Dates
| Exam | Registration End | Exam Date | Result |
|---|
| GATE | February 7, 2026 | August 30 to October 7, 2025 | March 19, 2026 |
| BVP CET (M.Tech Engineering) | August 7, 2026 | February 15 to August 10, 2026 | Within 2 weeks |
| CUET-PG | January 25, 2026 | March 6 to March 27, 2026 | April 24, 2026 |
- Candidates can apply through the official BVP CET portal at bvducet.bharatividyapeeth.edu.
- Final selection is based on a composite score from GATE or BVP CET-PG, the personal interview, and the marks of the qualifying examination.
- The BVDU University College of Engineering, Pune is approved by AICTE and accredited by NAAC and NBA for postgraduate engineering programmes.
The dates mentioned above are tentative and subject to change.
Eligibility Criteria
- Candidates must hold a B.E. or B.Tech degree in Electronics and Communication Engineering, Electronics and Telecommunication Engineering, or Electrical Engineering from a recognised university with a minimum of 50 percent aggregate marks.
- Candidates with a valid GATE score in Electronics and Communication Engineering (EC) or BVP CET-PG Engineering score are given preference in the merit list.
- Final selection rests on the GATE or BVP CET-PG score, the marks of the qualifying examination, and a personal interview at the BVDU Dhankawadi campus.
Admission Process
- Register on the BVDU CET portal at bvducet.bharatividyapeeth.edu and complete the online M.Tech application form.
- Pay the application fee online and upload B.E. or B.Tech transcripts along with a Statement of Purpose.
- Appear for BVP CET-PG Engineering on the scheduled date, or submit a valid GATE scorecard in lieu of the institute test.
- Shortlisted candidates are called for a personal interview at the BVDU University College of Engineering, Pune.
- Pay the first year tuition fee and complete the enrolment formalities to confirm the seat.
- Classes commence in August at the BVDU Dhankawadi campus with research orientation in the first semester.
✓ Opt for this if
- ECE graduates targeting growing semiconductor and chip design sector opportunities
- GATE EC qualifiers seeking AICTE-approved VLSI specialisation at moderate course fee
- Those aiming at RTL design, physical design, or FPGA roles at semiconductor firms
- Students interested in EDA tool-based product development and IC verification
✗ Skip if
- GATE top-100 EC scorers who qualify NIT or IIT VLSI Design M.Tech seats
- Students targeting software roles without hardware or digital design focus
- Those expecting top-tier semiconductor firm placements based on M.Tech alone
BVDU Pune M.Tech VLSI Design Scholarships 2026
| Scholarship | Amount | Eligibility |
|---|
| BVDU PG Merit Scholarship | Up to 25 percent tuition waiver | Top performers in BVP CET or graduation marks |
| Government Freeship for SC, ST, OBC | Tuition fee reimbursement | As per Maharashtra state norms |
| EBC Concession (Maharashtra) | Variable | Income certificate within prescribed slab |
| Sports Achievement Scholarship | Up to 100 percent tuition waiver | National or State level sports achievement |
| Need based Concession | Up to 25 percent tuition waiver | Based on family income and academic record |
- PG merit scholarships are linked to first year admission and renewed in the second year subject to CGPA criteria.
- Government scholarships and freeships are processed through the Maharashtra DBT portal after admission.
- External fellowships such as UGC NET-JRF and ICSSR are channelled through the central research cell.
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