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Renuka Seth

Intake: Fall 2017
University AppliedAcademics & Work Experience
Work Experience
14.3 yrs
GRE
305

Universities Applied

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admitted

University of Illinois, Chicago

admitted
MS Electrical and Computer Engineering
Applied Date: 20 Jan 2017
Decision: 23 Mar 2017

University of Texas Dallas, Richardson

admitted
M.S Electrical Engineering
Applied Date: 18 Jan 2017
Decision: 03 Mar 2017

Academics & Work Experience

Undergrad Details

Electrical and Electronics Engineering
Manipal Institute Of Technology
8.52
Aggregate score and pattern

Work Experience(1)

Senior Analog & Mixed Signal Circuit Design Engineer
Full time
Synopsys Inc.
May 2012 to Present

Skills(5)

VLSI
Analog Circuit Design
Digital Circuit Design
Coding
Perl

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