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Dr. D. Y. Patil School of Engineering Pune M.E Embedded System And Vlsi Design: Fees 2026, Course Duration, Dates, Eligibility
Dr. D. Y. Patil School of Engineering Pune M.E Embedded System And Vlsi Design is offered as 2 Years Full Time program, with total intake of 24 seats. The minimum eligibility criteria for M.E is Graduation. The total fees for Dr. D. Y. Patil School of Engineering Pune M.E Embedded System And Vlsi Design in 2025 is ₹ 1.76 Lakhs for the complete course duration, which includes total tuition fees of ₹ 1.66 Lakhs.
Dr. D. Y. Patil School of Engineering Pune M.E Embedded System And Vlsi Design fees in first year is ₹ 93,500. The detailed fees is mentioned below.
- The first year tuition fees is ₹ 82,963.
- Other Miscellaneous fees is ₹ 10,537.
Dr. D. Y. Patil School of Engineering Pune Hostel Fee is ₹ 50,000 to 90,000.
Dr. D. Y. Patil School of Engineering Pune offers a total of 24 seats for M.E Embedded System And Vlsi Design.
According to India Today Rankings 2023 for Engineering, Dr. D. Y. Patil School of Engineering Pune ranks 146 out of 246 in India.
Dr. D. Y. Patil School of Engineering Pune M.E Embedded System And Vlsi Design Fees 2025
| Fees (2025 - 2026) | Year 1 (in INR) | Year 2 (in INR) |
|---|---|---|
| Tuition Fees | ₹82963 | ₹82963 |
| Development Fees | ₹10537 | - |
| Yearly Fees | ₹93500 | ₹82963 |
* Fees is refundable
Dr. D. Y. Patil School of Engineering Pune M.E Embedded System And Vlsi Design Admission 2025
The minimum eligibility for admission to M.E Embedded System And Vlsi Design at Dr. D. Y. Patil School of Engineering Pune is Graduation.
Dr. D. Y. Patil School of Engineering Pune Ranking 2025
Dr. D. Y. Patil School of Engineering Pune ranking 2025 has not been released. You can check the agency wise previous year national ranking below.
| Ranking Agency | Latest | |
|---|---|---|
 | #146 out of 246 (2023) | |
Also Check:
| Course Highlights | Details |
|---|---|
| duration | 2 Years (Full Time) |
| course level | PG (Degree) |
| mode of study | On Campus |
| total fees | ₹ 1.76 Lakhs |
| eligibility | Graduation |
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Dr. D. Y. Patil School of Engineering Pune Latest Updates and News
02 Sep, 2026 GATE 2027 registration begins. Register @goaps.iitm.ac.in by Sept 27, 2026. GATE 2027 will be held between Feb 6 & 21, 2027. Read News.
Dr. D. Y. Patil School of Engineering Pune M.E Embedded System And Vlsi Design Fees
| Fee Type | Total Amount (INR) |
|---|---|
| total academic fee | ₹1.76 Lakhs |
| hostel fee | ₹1 Lakh |
| total fee | ₹2.76 Lakhs |
Important Dates for M.E Embedded System And Vlsi Design at Dr. D. Y. Patil School of Engineering Pune
Expired Events
| Events | Dates |
|---|---|
| Institute Quota and Vacant Seat Admission - MAHACET CAP Admission 2026 [ME/M.Tech] | Sep 09, 2026 - Sep 15, 2026 |
| Admission Cutoff Date - MAHACET CAP Admission 2026 [ME/M.Tech] | Sep 15, 2026 |
| Admitted Candidate Data Upload Deadline - MAHACET CAP Admission 2026 [ME/M.Tech] | Sep 15, 2026 |
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Dr. D. Y. Patil School of Engineering Pune M.E Embedded System And Vlsi Design Admission Process
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