Component

Amount (INR)

Programme Fee (2 years)

INR 1,15,000

Total Fees

INR 1,15,000

JCOE Kuran ME VLSI Design Admission 2026

Event	Date
GATE 2026 Result	March 19, 2026
PG CAP Round 1 Seat Allotment	July 31, 2026
PG CAP Round 2 Seat Allotment	August 11, 2026
PG CAP Round 3 Seat Allotment	August 24, 2026
PG CAP Round 4 Seat Allotment	September 4, 2026
Academic Session Begins	November 2026 (Tentative)

PG CAP option-form filling and allotment acceptance must be completed within the notified window on the DTE Maharashtra portal.

Candidates should verify GATE 2026 VLSI paper eligibility with DTE Maharashtra before filling option-form choices.

The dates mentioned above are tentative and subject to change.

Eligibility Criteria

Passed BE or BTech in Electronics and Telecommunication Engineering, Electronics Engineering, Electrical Engineering, or a closely related discipline with a minimum aggregate of 50% marks (45% for reserved category Maharashtra candidates).

A valid GATE 2026 score in the EC (Electronics and Communication Engineering) paper is required for admission through DTE Maharashtra PG Engineering CAP.

Candidates must upload their GATE scorecard, BE or BTech marksheets, degree certificate, and applicable caste or domicile documents during PG CAP online registration.

Admission Process

Appear for GATE 2026 in the EC paper and secure a qualifying score recognised by DTE Maharashtra for PG Engineering CAP.

Register on the DTE Maharashtra PG Engineering CAP portal and upload the GATE scorecard, BE or BTech marksheets, degree certificate, and category documents as applicable.

Fill the online option form during the allotment window, selecting JCOE Kuran ME VLSI Design as a preference based on GATE merit rank.

Receive provisional seat allotment based on GATE rank and option-form preferences submitted on the CAP portal.

Accept the allotment online and report to JCOE Kuran campus for document verification within the notified reporting schedule.

Pay the first instalment of fees at the institute to confirm admission for the 2026-27 academic session.

✓ Opt for this if

You hold a GATE EC score and want an SPPU-affiliated VLSI Design ME at low cost.
You seek postgraduate specialisation in chip design or embedded systems in Pune.
Budget under INR 1.5 lakhs is a priority for a full 2-year PG engineering degree.
You plan roles in semiconductor design or EDA tool firms in Pune after graduation.

✗ Skip if

You need a college with dedicated VLSI labs and industry tie-ups for deep research exposure.
You are targeting IIT or NIT ME VLSI programmes for premium semiconductor firm placements.
You want strong alumni networks in the semiconductor sector before choosing an institute.

JCOE Kuran ME VLSI Design Scholarships 2026

Scholarship	Amount	Eligibility
Maharashtra Post-Matric Scholarship	As per state norms	SC/ST/OBC/NT/SBC Maharashtra domicile students with family income below threshold. Apply via mahadbt.maharashtra.gov.in
EBC Scholarship	As per state norms	Economically backward class students in Maharashtra with annual family income within prescribed ceiling
Rajashri Shahu Maharaj Merit Scholarship	As per state norms	OBC students from Maharashtra who secure distinction or first class in the qualifying degree

All scholarship applications must be submitted through the MahaDBT portal before the notified academic-year deadline.

JCOE Kuran ME VLSI Design FAQs

Ques. Is GATE mandatory for ME VLSI Design admission at JCOE Kuran?

Ans. Yes, a valid GATE 2026 score in the EC (Electronics and Communication Engineering) paper is required. Admission is through DTE Maharashtra PG Engineering CAP, which uses GATE rank as the sole selection criterion. There is no separate institute-level test or management-quota admission for this programme at JCOE Kuran.

Ques. What is the total fee for ME VLSI Design at JCOE Kuran?

Ans. The total programme fee for the 2-year ME in VLSI Design at JCOE Kuran is INR 1,15,000 for the complete course. Eligible Maharashtra residents from SC/ST/OBC/NT/SBC and EBC categories can apply for government scholarship support through the MahaDBT portal, which may significantly reduce the net cost.

Ques. Which undergraduate branches are eligible for ME VLSI Design at JCOE Kuran?

Ans. Candidates with a BE or BTech in Electronics and Telecommunication Engineering, Electronics Engineering, or Electrical Engineering are eligible. A minimum aggregate of 50% marks in the qualifying degree (45% for reserved category Maharashtra candidates) and a valid GATE score in the EC paper are required for PG Engineering CAP registration.

Ques. How many seats are available in ME VLSI Design at JCOE Kuran?

Ans. ME VLSI Design at JCOE Kuran has an intake of 6 seats for the 2026-27 batch. This small cohort allows concentrated faculty attention and project-based learning. Seats are allotted strictly through DTE Maharashtra PG Engineering CAP based on GATE EC rank and the option-form choices filled by the candidate.

Ques. What career opportunities open up after ME VLSI Design from JCOE Kuran?

Ans. Graduates can work as VLSI design engineers, RTL designers, physical design engineers, and verification engineers in semiconductor firms, EDA companies, and defence electronics organisations. Pune hosts several semiconductor and embedded technology companies. The SPPU ME degree also qualifies holders for PhD research and teaching positions in electronics engineering departments.

Jai Hind College OF Engineering Kuran M.E Vlsi Design: Fees 2026, Course Duration, Dates, Eligibility

JCOE Kuran ME VLSI Design Fees 2026

JCOE Kuran ME VLSI Design Admission 2026

Eligibility Criteria

Admission Process

JCOE Kuran ME VLSI Design Scholarships 2026

Table of Contents

JCOE Kuran ME VLSI Design FAQs

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